Alex Eichenberger (Summer 1994 and 1995), University of Michigan. Worked on rotating register allocation and stage scheduling.
Joel Jones (Summer 1994 and 1995), University of Illinois. Worked on modulo scheduling.
Sirni Mantripragada (Summer 1994), University of California, Irvine. Worked on the development of a prototype scalar scheduler.
David August (Summer 1995), University of Illinois. Worked on the control flow analysis tools, preparation of loops for software-pipelining and if-conversion.
Brian Deitrich (Summer 1995), University of Illinois. Worked on hyper-block scheduling and meld scheduling.
Teresa Johnson (Summer 1996), University of Illinois. Worked on the cache-miss sensitive load scheduler and HPL-PD simulation path.
Matthai Philipose (Summer 1996), University of Washington. Extended the control-flow analysis and transformations. Also worked on the region formation tool-set.
Sumedh Sathaye (Summer 1996), North Carolina State University. Worked on reaching-definition analysis and register renaming.
Marnix Arnold (Summer 1997), Delft University. Worked on the code generation to support machine-specific literal types, complex operations, and emulation of unsupported operations.
Daniel Connors (Summer 1997), University of Illinois. Developed an inter-procedural call graph representation in Elcor and worked on code transformation to exploit local memory structures.
Matt Jennings (Summer 1997), North Carolina State University. Worked on classical optimizations including common sub-expression elimination and loop-invariant code removal.
Suren Talla (Summer, 1997) New York University. Worked on resource and recurrence estimators for acyclic code, and an iterative data height reduction system to reduce critical path lengths.