Backend Compilation and Architecture Exploration
Trimaran is an integrated compilation and performance monitoring
infrastructure. The architecture space that Trimaran covers is
characterized by HPL-PD, a parameterized
processor architecture supporting novel features such as predication,
control and data speculation and compiler controlled management of the
memory hierarchy. Trimaran also consists of a full suite of analysis and
optimization modules, as well as a graph-based intermediate language.
Optimizations and analysis modules can be easily added, deleted or bypassed,
thus facilitating compiler optimization research. Similarly, computer
architecture research can be conducted by varying the HPL-PD machine via the
machine description language HMDES. Trimaran also provides a detailed
simulation environment and a flexible performance monitoring environment
that automatically tracks the machine as it is varied. Trimaran is
intended for researchers and educators interested in the following
|Compiler Technology||Computer Architecture|
- Trimaran 4.0 is now available for download.
- A SUIF add-on frontend is also now available for download.
- New benchmark packages are available for download.
Trimaran began as a collaborative effort between the Compiler and
Architecture Research (CAR) Group (once a member of Hewlett
Packard Laboratories), the IMPACT
Group at the University of Illinois, and the ReaCT-ILP
Laboratory at New York University (now known as CREST, the Center for Research
on Embedded Systems and Technology at the Georgia Institute of
Technology). During the past few years, Trimaran was actively developed and
maintained by the CCCP
Group at the University of Michigan, and the Commit Group at
MIT. Today's active contributors are the CCCP group, Prof. Nathan Clark at the Georgia Institute of Technology, and Rodric Rabbah at IBM Research.
Trimaran is distributed without charge for non-commercial use.